1. Field of the Invention
The present invention relates to a CRT drive circuit, and more particularly to a CRT drive circuit in a CRT display device which can be used as a computer terminal.
2. Description of the Prior Art
A prior art which is pertinent to the present invention is explained in conjunction with FIG. 1 which shows a block diagram of a CRT drive circuit in a color display device which can be used as a computer terminal. The prior art shown in FIG. 1 is disclosed in pages 143 and 144 of collected papers for lecture to The Institute of Television Engineers of Japan, published on July 1, 1980. In FIG. 1, three video signals corresponding to red, blue and green and consisting of time sequence pulses are applied to video input terminals 10, 12 and 14, respectively, and thence to video amplifier circuits 16, 18 and 20, respectively. As represented by the circuit 16, each of the video amplifier circuits 16, 18 and 20 includes an impedance matching resistor 22, a video preamplifier 24, a video power amplifier 26 and a D.C. restore circuit 28. A synchronizing signal is applied to a synchronizing signal input terminal 30 and amplified in a synchronizing signal amplifier circuit 32 and the amplified signal is then supplied to the video amplifier circuits 16, 18 and 20. A blanking signal for erasing horizontal flyback lines is applied to a terminal 34, thence to a blanking circuit 36. The blanking signal is usually derived by damping horizontal flyback pulses. Outputs from the video amplifier circuits 16, 18 and 20 are supplied to a cathode of a CRT 38.
The terminals 10, 12, 14 and 30 are connected to a video signal transmission cable. The video signal applied to the terminal 10 has a waveform as shown in FIG. 2(b), which is amplified by the preamplifier 24 to produce a waveform shown in FIG. 2(c) which is analoguous to that of FIG. 2(b). The blanking signal shown in FIG. 2(d) renders a transistor 40 of a blanking circuit 36 ON during a high level period or a blanking period so that the outputs of the preamplifiers 24 of the video amplifiers 16, 18 and 20 are clamped to zero level through diodes 42, 44 and 46, respectively. This zero level corresponds to a black level of the video signal. Accordingly, the intermediate video signal shown in FIG. 2(c) is clamped to the black level of the video signal during the blanking period and it is phase-inverted by the video output amplifier 26 an output of which is fed to the D.C. restore circuit, thence to the cathode of the CRT 38. The video signal consists of a pulse wave which essentially includes only high level and low level. Accordingly, the preamplifier 24 may be regarded as a gate circuit and the video power amplifier 26 may be regarded as an inverter circuit.
The synchronizing signal shown in FIG. 2(a) is supplied to the D.C. restore circuit 28 through a capacitor 50. A capacitor 52 in the D.C. restore circuit 28 has a relatively large capacitance so that it exhibits substantially no impedance to the synchronizing signal. It is charged to the voltage corresponding to the black level input of the CRT by a voltage derived by dividing a +B power supply voltage by a dividing potentiometer 54. A coupling capacitor 56 functions to block a D.C. component of the video signal and pass only an A.C. component. It is charged by the +B power supply through a resistor 58. When the synchronizing signal shown in FIG. 2(a) is supplied to the D.C. restore circuit through the capacitor 50, a positive voltage is applied to a base of a transistor 62 through a resistor 60 during the pulse period so that the transistor 62 is rendered ON during that period and the potential at the junction of the capacitor 56 and the resistor 58 falls to the potential of the capacitor 52 (black level). The potential (black level) at the junction is held by the capacitor 56 immediately after the transistor 62 is turned off and it gradually rises with time by the +B power supply. As shown in FIG. 2, since the synchronizing signal (a) is included in the pulse width of the blanking signal (d), the black level of the video signal is restored by the D.C. restore circuit 28. Accordingly, a video signal as shown in FIG. 2(e) appears at the junction of the capacitor 56 and the resistor 58. The voltage between the black level and the zero level corresponds to the voltage across the capacitor 52. A diode 64 has a back current blocking function.
In this circuit, if the synchronizing signal is lost, the D.C. restore circuit 16 does not operate and the D.C. level of the video signal at the output of the video amplifier circuit shifts to the level of the +B power supply. As a result, a deep bias is created between the cathode and the grid of the CRT and electron beams are hardly emitted. Consequently, no image is produced and one may misunderstand that a significant trouble has occurred in spite of the fact that the CRT drive circuit operates properly. When the video signal is lost, the input to the preamplifier 24 assumes low level and no light appears on the CRT screen. In such a case, there is no simple way to check whether the CRT drive circuit operates properly.